Difference between revisions of "Programmable Logic Lessons"
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** We'll Implement something relevant to avoid too much boring theory | ** We'll Implement something relevant to avoid too much boring theory | ||
| − | ==== [[PLD_Workshop_18_06_2013|Computer architecture]] ==== | + | ==== [[PLD_Workshop_18_06_2013|Computer architecture (slides coming real soon(™))]] ==== |
* Introduction | * Introduction | ||
* Implement a very basic cpu | * Implement a very basic cpu | ||
Revision as of 20:32, 13 June 2013
Contents
Description
Basic introduction into fpgas (and digital logic). This will have a lot of new stuff if you are a total begginer, you'll have to study abit to keep up :)
The plan is to have 3 introductory sessions, and then get into more hands on things. Hopefully we'll have our own (tiny and minimal) working cpu by the end of this !
The schedule will be adapted as we go on -- this is a rough plan
Prerequisite knowledge and skills
- Basic understanding of programming
- Basic knowledge of git (http://githowto.com/ can help you, we'll use git for examples and collaborating)
- Github account (We'll host our stuff there)
- A laptop (We do have some some spare computers in hackerspace, but you'll need to work on your own at home)
Doodle pool for date selection
http://www.doodle.com/yp99tnvzvq7ygwmy#table -> Begining Tuesday, May 28, 2013 7:00 PM - 9:00 PM, and generally Tuesdays 7 - 9
Schedule
Digital electronics recap (click for slides)
- Welcome to hackerspace.gr !
- Fast recap of digital electronics basics
- Workshop page includes slides and useful links :)
Tooling, VHDL/Verilog basics (click for slides)
- Xilinx tooling (we'll use it)
- VHDL & Verilog introduction
- Design goals, short history
- Verilog syntax & examples
- We'll do some hands on basic stuff on our h/w !
More complicated structures (slides coming real soon(tm))
- More digital design stuff
- Clocked vs clockless/asynchronous design
- Clock domains, etc
- Buffers, fifo, pipelines, etc
- We'll Implement something relevant to avoid too much boring theory
Computer architecture (slides coming real soon(™))
- Introduction
- Implement a very basic cpu
- think together something more complicated for later on
Computer architecture, part 2
- More work on the design we'll have
- Implement it in software, see what tools are needed etc
- Break it in blocks so we can work on the verilog part
Computer architecture, part 3
- Implement the design in verilog
- Explore perfomance/cost/etc
- Let's make something fun with it -- perhaps a tiny brix clone or smth ?
- General info about more complex cpu designs (closer to the curren generation of cpus) and about gpu/stream processing
- General talk about sharing/working with open source hardware
Hardware
Papilio One - 500K - https://www.sparkfun.com/products/11158
- Xilinx Spartan 3E/500K gates
Atlys - Spartan6 - http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,836&Prod=ATLYS&CFID=1733993&CFTOKEN=46850973
- has cute hdmi output
Related material
- http://www.doe.carleton.ca/~jknight/97.478/PetervrlK.pdf (Verilog introduction)
- http://hamsterworks.co.nz/mediawiki/index.php/FPGA_course (VHDL, we'll actually do verilog though)
Useful Links
- http://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/design-tools.html (*ISE*, _not_ Vivado)
- https://github.com/skmp/tsc8 (A tiny cpu I implemented in vhdl a long time ago)
- http://opencores.org/ (Lots and lots of code you can stare at)
Contact
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