Difference between revisions of "PLD Workshop 2013/09/25"
From Hackerspace.gr
(Created page with "{{Event |logo=Simple_soc_logo.jpg |what=PLD/FPGA Workshop 2.1 |tagline=Let there be code |eventowner=User:Skmp |who=Hackerspace.gr |url=Hackerspace.gr |from=2013/09/25 19:30:00 |...") |
(→Stuff for review) |
||
| Line 18: | Line 18: | ||
''ISA/SoC, C# WIP project @ [https://github.com/pld-lessons/simple_soc github/simple_soc]'' | ''ISA/SoC, C# WIP project @ [https://github.com/pld-lessons/simple_soc github/simple_soc]'' | ||
| − | |||
| + | ''sdlcore WIP @ [https://github.com/pld-lessons/simple_soc/blob/master/src/sdlcore/core.cpp github]'' | ||
==== Plans for the workshop ==== | ==== Plans for the workshop ==== | ||
Revision as of 01:30, 23 September 2013
 [Hackerspace.gr external link] |
Starts | Organizer |
|---|---|---|
| Wed 25 Sep 2013 19:30 | Hackerspace.gr | |
| Ends | Event Owner | |
| Wed 25 Sep 2013 21:00 | User:Skmp |
Let there be code
Stuff for review
ISA/SoC, C# WIP project @ github/simple_soc
sdlcore WIP @ github
Plans for the workshop
- See the C implementation
- Perhaps extend the spec with vsync wait ? (already implemented in sdlcore)
- Overall design of the verilog implementation
- And write some code for it
Also checkout The main project page
