Difference between revisions of "PLD Workshop 2013/09/25"
From Hackerspace.gr
(→Stuff for review) |
|||
| Line 1: | Line 1: | ||
{{Event | {{Event | ||
|logo=Simple_soc_logo.jpg | |logo=Simple_soc_logo.jpg | ||
| − | |what=PLD/FPGA Workshop 2. | + | |what=PLD/FPGA Workshop 2.2 |
| − | |tagline= | + | |tagline=Verilog at last |
|eventowner=User:Skmp | |eventowner=User:Skmp | ||
|who=Hackerspace.gr | |who=Hackerspace.gr | ||
Revision as of 01:31, 23 September 2013
 [Hackerspace.gr external link] |
Starts | Organizer |
|---|---|---|
| Wed 25 Sep 2013 19:30 | Hackerspace.gr | |
| Ends | Event Owner | |
| Wed 25 Sep 2013 21:00 | User:Skmp |
Verilog at last
Stuff for review
ISA/SoC, C# WIP project @ github/simple_soc
sdlcore WIP @ github
Plans for the workshop
- See the C implementation
- Perhaps extend the spec with vsync wait ? (already implemented in sdlcore)
- Overall design of the verilog implementation
- And write some code for it
Also checkout The main project page
